ICS93738AF.DDR and SDRAM buffer.Datasheet

  • Автор записи:
  • Рубрика записи:Logic chips

DDR & SDRAM fanout buffer, for VIA P4X/KT266/333 chipsets

Low skew, fanout buffer
1 to 12 differential clock distribution
I 2C for functional and output control
Feedback pin for input to output synchronization
Supports up to 4 DDR DIMMs or 3 SDRAM DIMMs
+ 2 DDR DIMMs
Frequency supports up to 200MHz (DDR400)
Supports Power Down Mode for power
mananagement
CMOS level control signal input