– CPU : Operable at a minimum bus cycle time of 0.5μs (microsecond)
– On-chip ROM maximum capacity : 48K bytes
– On-chip RAM capacity : 1152 bytes (LC866548A/40A/32A)
: 896 bytes (LC866528A/24A)
– VFD automatic display controller/driver
– 16-bit timer/counter (or two 8-bit timers)
– 16-bit timer/ PWM (or two 8-bit timers)
– 8-channels × 8 bit AD Converter
– Two 8-bit synchronous serial-interface circuits (1-channel × 16 bit, 1-channel × 8 bit)
– 14-source 10-vectored interrupt system