• Single chip solution:
– AD-conversion for CVBS or Y/C or YUV1), multistandard color decoding, PLL for
synchronization of inset channel, decimation filtering, embedded memory, RGB-
matrix, DA-conversion, RGB/YUV switch, data-slicer and clock generation
integrated on chip
• Analog inputs:
– 3x CVBS or 1x CVBS and 1x Y/C or 1xYUV (SDA 9588X) alternatively
– Clamping of each input
– All ADCs with 8 bit amplitude resolution
– Automatic Gain Control (AGC) for Y and CVBS
• Inset Synchronization:
– Multiple time constants for reliable synchronization
– Automatic recognition of 625 lines / 525 lines standard
• Color Decoder:
– PAL-B/G, PAL-M, PAL-N(Argentina), PAL60, NTSC-M, NTSC4.4 and SECAM
– Adjustable color saturation
– Hue control for NTSC
– Automatic Chroma Control (-24 dB … +6 dB)
– Automatic recognition of chroma standards: different search strategies selectable
– Single crystal for all standards
– IF-characteristic compensation filter
• Decimation:
– PIP sizes between 1/81 and 1/9 adjustable with steps of 2 lines and 4 pixel
– Resolution up to 216 luminance and 2×54 chrominance pixels per inset line
– Horizontal and vertical filtering dependent on picture size
• Display Features:
– 7 bit per pixel stored in memory
– Field and joint-line free frame mode display
– Display on VGA and SVGA screen (fH limited to 40kHz)
– 8 different read frequencies for 16:9 compatibility
– Line doubling mode for progressive scan applications
– Freeze picture
– Coarse positioning at 4 corners of the parent picture
– Fine positioning at steps of 4 pixels and 2 lines
• Output signal processing:
– 7 Bit DAC
– RGB or YUV switch: insertion of an external source without PIP processing
– Digital interpolation for anti-imaging

– Adjustable transient improvement for luma (peaking)
– Contrast, Brightness and Pedestal Level adjustable
– Analog outputs: Y, +(B-Y), +(R-Y), or Y, -(B-Y), -(R-Y) or RGB
– Three RGB matrices available: NTSC(Japan), NTSC(USA) or EBU
– 64 different background colors and 4096 different frame colors
– Plain or 3D frame with variable width and height
• Data Slicing:
– Slicing of closed-caption (CC) or wide-screen-signaling (WSS) data
– Violence blocking capability (V-chip)
– Several filter for XDS data extraction
• I 2C-Bus control (400 kHz)
• High stability clock generation
• PDSO 28-1 package (SMD)
• Full SDA 9489X and SDA 9589X upward compatibility
• SDA 9388X / SDA 9389X pinout compatibility
• 3.3V supply voltage (5V input capable