The PLL synthesizer consists of a divide-by-eight prescaler, a 15-bit programmable divider, a 4 MHz crystal oscillator and its programmable reference divider and a phase comparator combined with a charge pump which drives the tuning amplifier, including 33 V output

• Single chip 5 V mixer/oscillator-PLL synthesizer for
hyperband tuners
• I2C-bus protocol
• 3 PNP band switch buffers (25 mA)
• 33 V tuning voltage output
• In-lock detector
• 5-level Analog-to-Digital Converter (ADC)
• 15-bit programmable divider
• Programmable reference divider ratio
(512, 640 or 1024)
• Programmable charge pump current
• Balanced mixer with a common emitter input for VHF
(single input)
• Balanced mixer with a common base input for UHF
(double input)
• 4-pin common emitter oscillator for VHF
• 4-pin common emitter oscillator for UHF
• IF amplifier with a low output impedance to drive a SAW
filter directly (≈2 k Ω load)
• Low power, low radiation, small size