EN25Q32B-104HIP.32Mb serial FLASH memory.Datasheet

EN25Q32B-104HIP (Q32B-104HIP)

• Single power supply operation
– Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• 32 M-bit Serial Flash
– 32 M-bit/4096 K-byte/16384 pages
– 256 bytes per programmable page
• Standard, Dual or Quad SPI
– Standard SPI: CLK, CS#, DI, DO, WP#
– Dual SPI: CLK, CS#, DQ0, DQ1, WP#
– Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3
• High performance
– 104MHz clock rate for one data bit
– 80MHz clock rate for two data bits
– 50MHz clock rate for four data bits
• Low power consumption
– 12 mA typical active current
– 1 μA typical power down current
• Uniform Sector Architecture:
– 1024 sectors of 4-Kbyte
– 64 blocks of 64-Kbyte
– Any sector or block can be erased individually

• Software and Hardware Write Protection:
– Write Protect all or portion of memory via
software
– Enable/Disable protection with WP# pin
• High performance program/erase speed
– Page program time: 1.3ms typical
– Sector erase time: 90ms typical
– Block erase time 500ms typical
– Chip erase time: 25 seconds typical
• Lockable 512 byte OTP security sector
• Minimum 100K endurance cycle